Brain Computer Interfaces
Brain Computer Interfaces
The research area of brain computer interfaces is a highly specialised field that deals with the development and optimisation of systems that enable direct interaction with tissue, the user and the environment. These devices are primarily used to help patients suffering from neurodegenerative diseases or injuries to the nervous system by alleviating symptoms and significantly improving quality of life.
Functionality
The essential functions of these modern neural devices are based on a bidirectional interface to enable communication between humans and technology. The bidirectional interface enables two main activities:
1. Read-out: Recording neural activity to read neural tasks or intentions.
2. Write-in: Performing electrical stimulation to write new information into the tissue or suppress symptoms.
Application Areas
Neuro devices are used to restore lost motor or sensory functions and suppress symptoms. These include:
Deep brain stimulation (DBS): Used to treat Parkinson's patients to reduce uncontrollable tremors and restore motor control
Retinal implants: Can restore vision in patients with retinitis pigmentosa by translating data from an external camera into neural signals in the retina
Restoring freedom of movement: In cases of paraplegia, movement intentions can be recorded from brain signals to control a prosthesis or exoskeleton. Neural devices can restore walking after spinal cord injury.
Communication: Brain-computer interfaces (BCIs) in the motor cortex can be used to decode intended speech or handwriting patterns, particularly in patients with severe paralysis or cognitive impairment.
The Relevance of Microelectrode Arrays (MEAs)
MEAs are crucial for invasive technologies because they offer superior temporal and spatial resolution compared to non-invasive methods such as EEG. This is necessary to precisely track the activity of individual neurons (spikes) and enable real-time processing of neural signals, for example to predict movement intentions (neural decoding). The interaction between tissue, user and environment in neurodegenerative diseases or injuries is made possible by the use of penetrating/invasive microelectrodes for extracellular recording and stimulation.
The End-to-End Signal Processing Pipeline
In our research, we focus particularly on optimising the end-to-end signal processing pipeline for invasive BCIs, which typically use penetrating microelectrode arrays (MEAs) such as Utah or Michigan arrays.
The pipeline enables reliable closed-loop signal processing in real time. The processing of spike activity serves to drastically reduce the number of features for subsequent decoding.
The Stages of the End-to-End Signal Processing Pipeline
1) Analogue processing (digitisation of neural inputs): In the first stage, the analogue input signal is converted into a digital format.
2) Spike sorting (pre-processing of neural signals): In this stage, the raw data is processed to detect spike activity and separate the activities of different neurons from each other. This drastically reduces the number of features for subsequent decoding.
3) Neural decoding: Here, the resulting spike sequences are interpreted to predict movement intentions or identify cognitive states, for example.
Research Opportunities
The central technological focus is on hardware implementation and shifting processing to implantable or wearable hardware to ensure real-time processing, low latency and high patient comfort.
Resource constraints: Computationally complex algorithms, especially deep learning algorithms, often cannot be executed on-chip or on embedded systems. It is necessary to minimise memory and computing requirements while ensuring low power consumption.
Shifting processing: The trend is to transfer all necessary algorithms from remote processors (workstations) to on-implant electronics or wearable devices. This reduces the data rate by up to 600 times per channel, as spike trains are transmitted instead of raw data.
Deep learning optimisation: The high computational requirements of deep learning pose major challenges for integration into embedded hardware systems.
Research into efficiency improvements: In the context of deep learning applications on resource-constrained devices, intensive research is being conducted into reducing memory and computing requirements.
Quantisation: Fixed-point (FxP) quantisation schemes reduce the bit width of parameters (weights and biases) to lower memory consumption and speed up calculations.
Quantised parameter updates (QPU): A new approach that uses stochastic rounding (SR) to achieve performance comparable to the straight-through estimator (STE) when training neural networks (e.g., on the FASHION-MNIST dataset), but significantly reduces memory consumption during training (e.g., to 57% of memory usage compared to STE).
Contact: Dr.-Ing. Andreas Erbslöh